Introduction :
The 74HC138 decodes three binary weighted address inputs (A0, A1 and A2) toeight mutually exclusive outputs (Y0 to Y7).
The device features three enable inputs (E1, E2 andE3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH.
This multiple enablefunction allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four '138 ICsand one inverter.
74HC138 can be used as an eight output demultiplexer by using one of the activeLOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs includeclamp diodes. This enables the use of current limiting resistors to interface inputs to voltages inexcess of VCC..
Features :- Designed specifically for high speed.
- Incorporates three enable pins to simplify cascading.
- De-multiplexing capability.
- Schottky clamped for high performance.
- ESD protection.
- Balanced propagation delays.
- Inputs accept voltages higher than VCC.
- Supply voltage: 1.0V to 5.5V.
- Typical propagation delay: 21nS.
- Low power consumption: 32mW.
- Operating temperature: -40ÂșC to +125ÂșC.