74HC195 is a high speed 4-bit SHIFTREGISTER utilizes advanced silicon-gate CMOS technolo-gy to achieve the low power consumption and high noiseimmunity of standard CMOS integrated circuits, along withthe ability to drive 10 LS-TTL loads at LS type speeds.
This shift register features parallel inputs, parallel outputs, J-Kserial inputs, SHIFT/LOAD control input, and a directoverriding CLEAR.
This shift register can operate in twomodes: PARALLEL LOAD; SHIFT from QAtowards QD.Parallel loading is accomplished by applying the four bits ofdata, and taking the SHIFT/LOAD control input low.
Thedata is loaded into the associated flip flops and appears atthe outputs after the positive transition of the clock input.
During parallel loading, serial data flow is inhibited. Serialshifting occurs synchronously when the SHIFT/LOAD con-trol input is high.
Serial data for this mode is entered at theJ-Kinputs. These inputs allow the first stage to perform as aJ-Kor TOGGLE flip flop as shown in the truth table.The 54HC/74HC logic family is functionally as well as pin-out compatible with the standard 54LS/74LS logic family.
All inputs are protected from damage due to static dis-charge by internal diode clamps to VCCand ground.
- Propagation Delay Time: 175 ns at 2V / 30 ns at 6V.
- Output Current: 5.2 mA at 6 V.
- No. of Inputs:
- No. of Pins: 16.
- Operating Temperature Range: -55 C to 125 C.
- Supply Voltage Range: 2V to 6V.
- Package type : DIP-16.